Model Based Test Generation for Processor Verification

Yossi Lichtenstein, Yossi Malka, Aharon Aharon

Research output: Contribution to conferencePaperpeer-review

15 Citations (Scopus)

Abstract

A few simple Expert-System techniques have been invaluable in developing a new test program generator for design verification of hardware processors. The new generator uses a formal declarative model of the processor architecture; it allows generation of test programs for a variety of processors without duplication of effort.
Original languageEnglish
Publication statusPublished - Aug 1994
EventProceedings of the American Association of AI's 6th Innovative Applications of Artificial Intelligence Conference (IAAI) -
Duration: 1 Aug 1994 → …

Conference

ConferenceProceedings of the American Association of AI's 6th Innovative Applications of Artificial Intelligence Conference (IAAI)
Period1/08/94 → …

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