Model Based Test Generation for Processor Verification

Yossi Lichtenstein; Yossi Malka; Aharon Aharon

Model Based Test Generation for Processor Verification

Yossi Lichtenstein
, Yossi Malka
, Aharon Aharon

Norwich Business School

Research output: Contribution to conference › Paper › peer-review

16 Citations (Scopus)

Abstract

A few simple Expert-System techniques have been invaluable in developing a new test program generator for design verification of hardware processors. The new generator uses a formal declarative model of the processor architecture; it allows generation of test programs for a variety of processors without duplication of effort.

Original language	English
Publication status	Published - Aug 1994
Event	Proceedings of the American Association of AI's 6th Innovative Applications of Artificial Intelligence Conference (IAAI) - Duration: 1 Aug 1994 → …

Conference

Conference	Proceedings of the American Association of AI's 6th Innovative Applications of Artificial Intelligence Conference (IAAI)
Period	1/08/94 → …

Cite this

@conference{c95c6194e8eb489095febb33a854d0c0,

title = "Model Based Test Generation for Processor Verification",

abstract = "A few simple Expert-System techniques have been invaluable in developing a new test program generator for design verification of hardware processors. The new generator uses a formal declarative model of the processor architecture; it allows generation of test programs for a variety of processors without duplication of effort.",

author = "Yossi Lichtenstein and Yossi Malka and Aharon Aharon",

year = "1994",

month = aug,

language = "English",

note = "Proceedings of the American Association of AI's 6th Innovative Applications of Artificial Intelligence Conference (IAAI) ; Conference date: 01-08-1994",

}

TY - CONF

T1 - Model Based Test Generation for Processor Verification

AU - Lichtenstein, Yossi

AU - Malka, Yossi

AU - Aharon, Aharon

PY - 1994/8

Y1 - 1994/8

N2 - A few simple Expert-System techniques have been invaluable in developing a new test program generator for design verification of hardware processors. The new generator uses a formal declarative model of the processor architecture; it allows generation of test programs for a variety of processors without duplication of effort.

AB - A few simple Expert-System techniques have been invaluable in developing a new test program generator for design verification of hardware processors. The new generator uses a formal declarative model of the processor architecture; it allows generation of test programs for a variety of processors without duplication of effort.

M3 - Paper

T2 - Proceedings of the American Association of AI's 6th Innovative Applications of Artificial Intelligence Conference (IAAI)

Y2 - 1 August 1994

ER -