As computing power increases there is a natural tendency to use it to tackle larger problems in greater detail. The perfect description of a semiconductor device may provide an exact measure of the power dissipation. But when it is realised that the chip is on a header, encapsulated in a package which is attached to one of many circuit boards within a cabinet, etc., then it is time to stand back and look at the forest and ignore the stomata on the leaves on the trees. This paper provides a tour of the problem, highlights some recent developments and suggests areas which might be usefully investigated in the future.
|Publication status||Published - 1997|
|Event||IEE Colloquium on Modelling and Simulation for Thermal Management (Digest No. 1997/043) - |
Duration: 1 Jan 1997 → …
|Conference||IEE Colloquium on Modelling and Simulation for Thermal Management (Digest No. 1997/043)|
|Period||1/01/97 → …|