Abstract
In VLSI cell placement, quadratic assignment places modules or cells such that the total weighted Euclidean distance between connected modules is minimised. However, current methods fail to take module size into account, and impractical placements can occur. An algorithm is proposed that takes module size into account, without a significant increase in computational expense.
Original language | English |
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Pages (from-to) | 1201-1203 |
Number of pages | 3 |
Journal | IEE Electronics Letters |
Volume | 33 |
Issue number | 14 |
DOIs | |
Publication status | Published - Jul 1997 |