@inproceedings{494f6214972a42f3aeee3acef29018ae,
title = "Reconfigurable neurons-making the most of configurable logic blocks (CLBs)",
abstract = "An area-efficient hardware architecture is used to map fully parallel cortical columns on Field Programmable Gate Arrays (FPGA) is presented in this paper. To demonstrate the concept of this work, the proposed architecture is shown at the system level and benchmarked with image and speech recognition applications. Due to the spatio-temporal nature of spiking neurons, this has allowed such architectures to map on FPGAs in which communication can be performed through the use of spikes and signal can be represented in binary form. The process and viability of designing and implementing the multiple recurrent neural reservoirs with a novel multiplier-less reconfigurable architectures is described.",
keywords = "FPGAs, neural signal processing, reconfigurable computing, recurrent neural networks, reservior computing",
author = "Arfan Ghani and See, {Chan H.} and Hassan Migdadi and Rameez Asif and Abd-Alhameed, {Raed A.A.} and Noras, {James M.}",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 6th International Conference on Internet Technologies and Applications, ITA 2015 ; Conference date: 08-09-2015 Through 11-09-2015",
year = "2015",
month = nov,
day = "2",
doi = "10.1109/ITechA.2015.7317451",
language = "English",
series = "2015 Internet Technologies and Applications, ITA 2015 - Proceedings of the 6th International Conference",
publisher = "The Institute of Electrical and Electronics Engineers (IEEE)",
pages = "475--478",
editor = "Abd-Alhameed, {Raed A} and Yuriy Vagapov and Rich Picking and Nigel Houlden and Denise Oram and Vic Grout and Julie Mayers and Stuart Cunningham and Susan Liggett",
booktitle = "2015 Internet Technologies and Applications, ITA 2015 - Proceedings of the 6th International Conference",
address = "United States",
}